Alexander Schaub (joint work with Jean-Luc Danger, Sylvain Guilley, and Olivier Rioul)

Abstract: Silicon physically unclonable functions (PUF) are used in various applications requiring robust authentication. These systems exploit unpredictable process variations in electronic circuits. These process variations uniquely identify the produced hardware, which exhibit distinct properties in terms, for example, of delay propagations inside the circuit. By measuring and exploiting these properties, one can determine a « fingerprint » of the circuit, which can not be physically replicated. This fingerprint can then be used, for instance, to produce a cryptographic key. The advantage is that this key does not need to be explicitly stored, which reduces the security risk. Other applications include challenge-response protocols, where the responses are determined from the physical properties of the circuit.

The reliability of the PUF is crucial because the cryptographic key or identifier generated by the PUF should remain steady over its life period. So far, reliability was assessed empirically for all the silicon PUFs and is relatively poor for bit error rates (BER) greater than 4%. Therefore, it is necessary to enhance reliability by a post-processing stage using error correcting codes. However, there was no predictive model to characterize the raw reliability level of PUFs. Such a formal knowledge would be particularly useful for the designer to calibrate the post-processing complexity and compare different PUF architectures without having recourse to a costly silicon implementation.
In this work, we develop a predictive framework which enables us to derive a closed form expression of both entropy and reliability for several families of delay PUFs: the RO PUF, the RO sum PUF as well as the Loop PUF. Improving these delay PUFs with bit filtering, we can provide an explicit trade-ou001B between complexity, reliability and entropy. Error rates about 10−9 or even lower can be achieved by this method.

Roberto Medina

Abstract: In safety-critical systems, due to safety requirements, only functionalities with the same level of criticality should share resources. However, this practice often leads to a waste of computation power, more so when mutli-core architectures are considered. Mixed-Criticality proposes a solution to this problem: by defining modes of execution for the system, critical and non-critical tasks share a common execution platform. Many contributions in this domain have been proposed in the literature, nonetheless, most of them only consider independent task set models. At an industrial level, independent task sets are restrictive: methods used to develop reactive safety-critical systems, often model such systems as data-dependent graphs. We consider Mixed-Criticality applications modeled as Directed Acyclic Graphs representing data dependencies among tasks. Our works have led to scheduling techniques outperforming the state of the art. In addition, since non-critical tasks’ execution ensure the system’s quality-of-service, we have also proposed availability analyses for this type of tasks.